When ESP/WSS runs with PARM=zIIP, it must employ SRB mode. This is a requirement of the zIIP CPU.
SRB mode can also be used outside zIIP, with conventional CPU. That’s why the zIIPed time is very close to the SRB_CPU time, but not a 100%.
Yes, here, 2/3 of CPU was spent by the Check Point Manager on the zIIP CPU.
The last column represents a TCB to SRB switch count, i.e. how many times a particular thread switched from TCB to SRB mode. Or, It’s fair to say how many times ESP/WSS switched from the conventional CPU to the zIIP one.