On April 23, 2013, IBM United States Software Announcement 213-144 introduced a new Compiler Option, ARCH, for Cobol 5.1. This option generates code to exploit newer processor instructions for different levels of z/Architecture. The levels range from ARCH(6) for lower level processors, to ARCH(10) which generates code for the zEC12 processors. When monitoring a Cobol 5.1 program with CA InterTest for CICS 9.1 and using ARCH(10), program execution will be stopped at an Automatic Breakpoint (ABP) preventing a perceived S0C4 abend due to the attempted use of an op/sys protected area.
Currently, CA InterTest for CICS release 9.1 does not support some of the instructions generated by ARCH(10) and a workaround is to use a lower ARCH level such as ARCH(6). The lower ARCH level can be used while the program is being tested and debugged and recompiled with ARCH(10) when the program is ready to be moved to a production environment. The caveat to this workaround, however, is that if it becomes necessary to debug a production program, it would need to be recompiled with ARCH(6) until ARCH(10) is fully supported.
The CA InterTest for CICS development team is in the process of reviewing the changes introduced by ARCH(10) in order to address the requirements introduced with the new code and generate a fix to the problem. Until a permanent fix is created, programmers can still take advantage of the ARCH compile option by using the circumvention described above while testing their Cobol 5.1 programs.